This invention relates to tri-state digital logic using nonlinear solid state device circuits in electrical transmission or interconnection systems; and more particularly to a semiconductor driver circuit which is based on complementary metal insulatoroxide (CMOS) field effect transistors, the driver being of the three-state type which assumes the three values of logic "zero," "one," and "float."
In systems in which digital data is transmitted bidirectionally between units of a system, or several units are interconnected via a common bus, there are two or more drivers and receivers coupled to each transmission conductor. It is then required that not more than one driver be active at any time to send a sequence of "zeros" and "ones". It is desirable that the output of other drivers be in a high-impedance "float" state to avoid undue loading of the active driver. Such driver circuits are well known as shown for example in U.S. Patents to Minato et al U.S. Pat. No. 4,280,065, Suzuki et al U.S. Pat. No. 4,217,502, Ferris U.S. Pat. No. 4,311,927 and Aoki U.S. Pat. No. 3,602,733. All of these show complementary semiconductor devices in series between the two poles of a direct current supply, with the output taken at the junction of the two devices. One of the devices is turned on to send a "one" and the other to send a "zero," while both are turned off for "float." A problem is that during the transition between "ones" and "zeros," both devices may momentarily be on at the same time, which causes a large drain on the power supply.